PG Diploma in VLSI Design & ASIC Verification
VLSI Training Institute in Bangalore, India
We at the Indian School of Business and Computing (ISBC) are honored to be known as one of Bangalore, India’s top VLSI training facilities. We work to equip aspiring engineers and electronics enthusiasts with cutting-edge VLSI design knowledge, supported by a solid educational heritage and a strong desire for innovation. Our VLSI programs are designed to support your growth and goals, whether you’re a professional looking to improve your skills or a student hoping to start a successful career in the semiconductor industry.
We specialize in assertions, functional coverage, Object-Oriented Programming (OOP), and designing verification environments in SystemVerilog. Learn about ASIC verification with UVM, including how to create a thorough testbench and verify on-chip protocols. Additionally, learn the fundamentals of Static Timing Analysis (STA), which is necessary for timing closure and performance optimization.
This extensive program, which consists of more than 500 hours and is led by industry professionals, equips you for successful careers in VLSI, SoC Design, and ASIC Verification.
Modules:
Core Engineering – 10 days (40Hrs)
- Electronics & Hardware Familiarization
- Basics of analog/digital electronics and logic design.
- Hands-on circuit simulation and debugging.
Core Programming Fundamentals -20 days (80 Hrs)
- Unified Programming Approach with C and C++
- Master in C programming
- Mastering in C++ with OOPs concepts.
VLSI Design – 25 days (100 Hrs)
- RTL coding with Verilog
- VLSI fundamentals, design methodology
- Different styles of modeling
- Conditional and procedural statements, delay modeling
- Advanced RTL designs
- On chip Protocols Design
- FPGA Hardware Design
Experiential Project Based learning: 5 days
- Digital design innovators: RTL to realization
Specializations
VLSI Verification using System Verilog– 25 days (100 Hrs )
- Design and Verification using System Verilog
- SystemVerilog concepts, OOP, assertions, and coverage
- Complete verification environment design
ASIC Verification using UVM & Timing Verification – 35 days (140 Hrs)
- Verification using UVM (Universal Verification Method)
- On chip Protocols Verification
- Experiential Project Based learning
- Static Timing Analysis (STA)
Project stream:
Core Programming:
- Application development based on Data Structure (Eg: Multi Client Chat Application, memory Leak Detection tool kit, E-Commerce cart simulator)
VLSI :
- Design and Simulation of Digital Controller/CPU Core/Protocols such as UART, SPI, I2C, AXI4
- Design, Simulation, Implementation and Verification of Digital Controllers, ALU Cores and protocols such as UART, SPI, I2C, AXI4 on FPGA
- SV Verification of Digital Controller/CPU Core/Protocols such as UART, SPI, I2C, AXI4
- UVM Verification of Digital Controller/CPU Core/Protocols such as UART, SPI, I2C, AXI4
Platforms:
- XILINX VIVADO
- Questasim/EDA Playground
- Artix7 FPGA Board
- ZYNQ SOC Board
- Yosys, OpenTimer
